HD63B09EP Technical Reference Guide By Chet Simpson

Converted to HTML by Theodore (Alex) Evans

INDEX

• Introduction
• Summary of Features
• Description of Additional Registers
• Modes of Operation
• Native Mode and Timing Loops
• Modes of the Fast Interrupt Request (FIRQ)
• Inter-Register Instructions
• Bit Manipulation of Memory Locations
• Bit Transfers Between Memory Locations and Registers
• Block Transfers
• New math instructions (MULD, DIVD, DIVQ)
• Error Trapping
• Additional instructions
• OP-Code Table
  • $00-$1F
  • $20-$3F
  • $40-$5F
  • $60-$7F
  • $80-$9F
  • $A0-$BF
  • $C0-$DF
  • $E0-$FF
  • $1020-$103F
  • $1040-$108F
  • $1090-$10AF
  • $10B0-$10FF
  • $1130-$115F
  • $1180-$11AF
  • $11B0-$11FF
• Mnemonic Table
  • Branch Instructions
  • Bit Manipulation and Transfers
  • Logical Memory Instructions
  • Inter-Register Instructions
  • Index Adressing Modes and Post- Byte Information
  • Register Description
  • Push/Pull Order
  • Push/Pull Post-Byte
  • Condition Code Register
• Notes
• Programmer Recomendations